Manoj Sachdev

(Author)

Defect-Oriented Testing for Nano-Metric CMOS VLSI CircuitsHardcover, 21 June 2007

Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits
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Part of Series
Frontiers in Electronic Testing
Print Length
328 pages
Language
English
Publisher
Springer
Date Published
21 Jun 2007
ISBN-10
0387465464
ISBN-13
9780387465463

Description

This book is essential to understand new test methodologies, algorithms and industrial practices. Without its insight into the physics of nano-metric technologies, it would be difficult to develop system-level test strategies that yield a high IC fault coverage. The work on defect-oriented testing presented in the book is not final, and it is an evolving field with interesting challenges imposed by the ever-changing nature of nano-metric technologies. The 2nd edition of Defect Oriented Testing has been extensively updated with the addition of chapters on Functional, Parametric Defect Models and Inductive fault Analysis and Yield Engineering to provide a link between defect sources and yield. Test and design practitioners from academia and industry will find that Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits lays the foundations for further pioneering work.

Product Details

Authors:
Manoj SachdevJosé Pineda de Gyvez
Book Format:
Hardcover
Country of Origin:
NL
Date Published:
21 June 2007
Dimensions:
23.6 x 16.21 x 1.88 cm
ISBN-10:
0387465464
ISBN-13:
9780387465463
Language:
English
Location:
New York, NY
Pages:
328
Publisher:
Weight:
721.21 gm

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