by Phil Moorby The Verilog Hardware Description Language has had an
amazing impact on the mod- em electronics industry, considering that the
essential composition of the language was developed in a surprisingly
short period of time, early in 1984. Since its introduc- tion, Verilog
has changed very little. Over time, users have requested many improve-
ments to meet new methodology needs. But, it is a complex and time
consuming process to add features to a language without ambiguity, and
maintaining consistency. A group of Verilog enthusiasts, the IEEE 1364
Verilog committee, have broken the Verilog feature doldrums. These
individuals should be applauded. They invested the time and energy,
often their personal time, to understand and resolve an extensive
wish-list of language enhancements. They took on the task of choosing a
feature set that would stand up to the scrutiny of the standardization
process. I would like to per- sonally thank this group. They have shown
that it is possible to evolve Verilog, rather than having to completely
start over with some revolutionary new language. The Verilog 1364-2001
standard provides many of the advanced building blocks that users have
requested. The enhancements include key components for verification,
abstract design, and other new methodology capabilities. As designers
tackle advanced issues such as automated verification, system
partitioning, etc., the Verilog standard will rise to meet the
continuing challenge of electronics design.