Micro-electronics and so integrated circuit design are heavily driven by
technology scaling. The main engine of scaling is an increased system
performance at reduced manufacturing cost (per system). In most systems
digital circuits dominate with respect to die area and functional
complexity. Digital building blocks take full - vantage of reduced
device geometries in terms of area, power per functionality, and
switching speed. On the other hand, analog circuits rely not on the fast
transition speed between a few discrete states but fairly on the actual
shape of the trans- tor characteristic. Technology scaling continuously
degrades these characteristics with respect to analog performance
parameters like output resistance or intrinsic gain. Below the 100 nm
technology node the design of analog and mixed-signal circuits becomes
perceptibly more dif cult. This is particularly true for low supply
voltages near to 1V or below. The result is not only an increased design
effort but also a growing power consumption. The area shrinks
considerably less than p- dicted by the digital scaling factor.
Obviously, both effects are contradictory to the original goal of
scaling. However, digital circuits become faster, smaller, and less
power hungry. The fast switching transitions reduce the susceptibility
to noise, e. g. icker noise in the transistors. There are also a few
drawbacks like the generation of power supply noise or the lack of power
supply rejection.