Stuart Sutherland

(Author)

Systemverilog for Design Second Edition: A Guide to Using Systemverilog for Hardware Design and ModelingPaperback, 29 October 2010

Systemverilog for Design Second Edition: A Guide to Using Systemverilog for Hardware Design and Modeling
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Print Length
418 pages
Language
English
Publisher
Springer
Date Published
29 Oct 2010
ISBN-10
1441941258
ISBN-13
9781441941251

Description

In its updated second edition, this book has been extensively revised on a chapter by chapter basis to include the many text and example updates needed to reflect changes adopted between the first edition of the book and the finalization of the new standard. The book accurately reflects the syntax and semantic changes to the SystemVerilog language, making it an essential reference for systems professionals who need the latest version information. In addition, the second edition features a new chapter that explains the SystemVerilog "packages", a new appendix that summarizes the synthesis guidelines presented throughout the book, and all of the code examples have been updated to the final syntax and rerun using the latest version of the Synopsys, Mentor, and Cadance tools.

Product Details

Authors:
Stuart SutherlandSimon DavidmannPeter Flake
Book Format:
Paperback
Country of Origin:
NL
Date Published:
29 October 2010
Dimensions:
23.39 x 15.6 x 2.31 cm
ISBN-10:
1441941258
ISBN-13:
9781441941251
Language:
English
Location:
New York, NY
Pages:
418
Publisher:
Weight:
625.96 gm

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