There has been continuing interest in the improvement of the speed of
Digital Signal processing. The use of Residue Number Systems for the
design of DSP systems has been extensively researched in literature.
Szabo and Tanaka have popularized this approach through their book
published in 1967. Subsequently, Jenkins and Leon have rekindled the
interest of researchers in this area in 1978, from which time there have
been several efforts to use RNS in practical system implementation. An
IEEE Press book has been published in 1986 which was a collection of
Papers. It is very interesting to note that in the recent past since
1988, the research activity has received a new thrust with emphasis on
VLSI design using non- ROM based designs as well as ROM based designs as
evidenced by the increased publications in this area. The main advantage
in using RNS is that several small word-length Processors are used to
perform operations such as addition, multiplication and accumulation,
subtraction, thus needing less instruction execution time than that
needed in conventional 16 bitl32 bit DSPs. However, the disadvantages of
RNS have b. een the difficulty of detection of overflow, sign detection,
comparison of two numbers, scaling, and division by arbitrary number,
RNS to Binary conversion and Binary to RNS conversion. These operations,
unfortunately, are computationally intensive and are time consuming.