Yield and reliability of memories have degraded with device and voltage
scaling in the nano-scale era, due to ever-increasing hard/soft errors
and device parameter variations. This book systematically describes
these yield and reliability issues in terms of mathematics and
engineering, as well as an array of repair techniques, based on the
authors' long careers in developing memories and low-voltage CMOS
circuits. Nanoscale Memory Repair gives a detailed explanation of the
various yield models and calculations, as well as various, practical
logic and circuits that are critical for higher yield and reliability.