The demand for ever smaller and portable electronic devices has driven
metal oxide semiconductor-based (CMOS) technology to its physical limit
with the smallest possible feature sizes. This presents various
size-related problems such as high power leakage, low-reliability, and
thermal effects, and is a limit on further miniaturization. To enable
even smaller electronics, various nanodevices including carbon nanotube
transistors, graphene transistors, tunnel transistors and memristors
(collectively called post-CMOS devices) are emerging that could replace
the traditional and ubiquitous silicon transistor. This book explores
these nanoelectronics at the circuit and systems levels including
modelling and design approaches and issues.
Topics covered include self-healing analog and radio frequency circuits;
on-chip gate delay variability measurement in scaled technology node;
nanoscale finFET devices for PVT aware SRAM; data stability and write
ability enhancement techniques for finFET SRAM circuits; low-leakage
techniques for nanoscale CMOS circuits; thermal effects in carbon
nanotube VLSI interconnects; lumped electro-thermal modeling and
analysis of carbon nanotube interconnects; high-level synthesis of
digital integrated circuits in the nanoscale mobile electronics era;
SPICEless RTL design optimization of nanoelectronic digital integrated
circuits; green on-chip inductors for three-dimensional integrated
circuits; 3D network-on-chips; and DNA computing.
This book is essential reading for researchers, research-focused
industry designers/developers, and advanced students working on
next-generation electronic devices and circuits.
