The proliferation of embedded systems, and the corresponding new chip
and chip set designs, have brought additional attention to storage
units. Indeed, the heterogeneity of components and structures within
embedded systems and the possibility of using application-specific
storage systems has added a new dimension to memory system design.
Moreover, new degrees of freedom have been opened since the introduction
of embedded memory arrays in different technologies, such as SRAMs,
DRAMs and EEPROMs and Flash, and their realization on the same silicon
substate hosting processing units.
Embedded systems are often designed under stringent energy consumption
budgets, to limit heat generation and battery size. Since memory systems
consume a significant amount of energy to store and to forward data, it
is then imperative to balance power consumption and performance in
memory system design. Contemporary system design focuses on the trade
off between performance and energy consumption in processing and storage
units, as well as in their interconnections. While memory design is as
important as processor design in achieving the desired design
objectives, the former topic has received less attention than the latter
in the literature.
Memory Design Techniques for Low Energy Embedded Systems centers one
of the most outstanding problems in chip design for embedded
application. It guides the reader through different memory organizations
and technologies and it reviews the most successful strategies for
optimizing them in the power and performance plane.
