Fault Masking in Synchronous and in Asynchronous LogicPaperback, 12 November 2019

The topic of this book is the investigation of fault masking effects in synchronous and asynchronous logic.A fault is said to be masked if it affects a circuit but never creates an erroneous state and hence stays ineffective. In synchronous logicit is known that faults can be masked on three different levels: (1) Electrical masking: A fault is injected on the electrical level, but it doesn't affect the logical level. The current pulse induced is not large enough to change the boolean value. (2) Logical masking: The fault changes a boolean value but the logical function which is performed on this signal does not take it into account. For example if you look at an AND-Gate (2 inputs), a "`false"' logic 1 only propagates if the other input is also 1. This we call implicit logical masking. Explicit logical masking is related to majority voting with replicated functions. (3) Temporal (latching-window) masking: This level deals with the temporal behavior, the fault disturbs a signal but it isn't captured. For example a transient fault between two clock edges in a synchronous circuit has no effect on the storage element as long as its effect has vanished by the next clock event