This book provides readers with a variety of algorithms and software
tools, dedicated to the physical design of through-silicon-via (TSV)
based, three-dimensional integrated circuits. It describes numerous
"manufacturing-ready" GDSII-level layouts of TSV-based 3D ICs developed
with the tools covered in the book. This book will also feature sign-off
level analysis of timing, power, signal integrity, and thermal analysis
for 3D IC designs. Full details of the related algorithms will be
provided so that the readers will be able not only to grasp the core
mechanics of the physical design tools, but also to be able to reproduce
and improve upon the results themselves. This book will also offer
various design-for-manufacturability (DFM), design-for-reliability
(DFR), and design-for-testability (DFT) techniques that are considered
critical to the physical design process.