One of the main applications of VHDL is the synthesis of electronic
circuits. Circuit Synthesis with VHDL is an introduction to the use of
VHDL logic (RTL) synthesis tools in circuit design. The modeling styles
proposed are independent of specific market tools and focus on
constructs widely recognized as synthesizable by synthesis tools.
A statement of the prerequisites for synthesis is followed by a short
introduction to the VHDL concepts used in synthesis. Circuit
Synthesis with VHDL presents two possible approaches to synthesis: the
first starts with VHDL features and derives hardware counterparts; the
second starts from a given hardware component and derives several
description styles. The book also describes how to introduce the
synthesis design cycle into existing design methodologies and the
standard synthesis environment.
Circuit Synthesis with VHDL concludes with a case study providing a
realistic example of the design flow from behavioral description down to
the synthesized level.
Circuit Synthesis with VHDL is essential reading for all students,
researchers, design engineers and managers working with VHDL in a
synthesis environment.